Here are the relevant sections of the email from Dr. Sander, as mentioned in show #13. First, on the infamous clock chip:
“The Clock chip chosen was state of the art for the time and worked pretty well for the timeframe, the problem was that National notified us just as shipment started that their QA labs had determined that their production line had contamination problems and the parts were not reliable. Since there was no second source we were stuck.”
On this Applelogic.org article, “What Really Killed the Apple III“:
“I had not seen the page you referenced but a real problem with his analysis is that the boards he evaluated were not the original fine-line boards that shipped. In fact it would be very hard to find the original boards since Apple replaced them all about 6 to 9 mos. after the original shipping. My recollection is that the number of boards replaced at that time was a few thousand, the old boards were recycled and the parts reused. He clearly looked at the improved memory connector as the original had a single wipe connection and his description fit the replacement main board. Both boards were 2 layer boards but the original used finer lines and had a large number (about 25 as I recall) wires on the back to complete the wiring. Both the original and replacement boards were 2 layer boards, the replacement design was simply the result of applying more time to the layout to use looser design rules and fewer wires (I think a couple were still there). There were also a few functional changes on the second board such as the ability to add a switch to provide an interlaced display. The replacement program was quite thorough so by the end of the first year there almost no unreliable Apple III’s in the field. An original board probably exists somewhere but I don’t know of any. Apple III’s were widely used inside Apple and replaced most of the Apple II’s fairly quickly and there were no problems observed with reliability after the early boards were replaced.”
And on the issue of loose chips on the PCB:
“I believe the source of the chips coming out of the sockets is based on the following. The system would freeze and not run so the user would remove the board and push down on the chips and it would start working again. The chip might even have not been fully seated from production and the user would feel a slight motion and think that is what fixed it. What really happened was the the board flexure from pushing on the board caused enough motion in the memory connector to clear the open. This type of failure is caused by oxidation at the contact point due to insufficient force and the slightest motion will clear the oxidation. Lifting the computer and dropping it usually also cleared the oxidation. As indicated in the article the replacement connector had multiple high force contact points and provided a very reliable connection.”
One thought on “Dr. Sander on the Clock chip and Applelogic.org”
My memory is that there were 3 versions of the motherboard for the ///. The first was the prototype board (2 layer) which had lots of wires and was really just used for the launch, etc. The issue was that the auto-routing software that Apple used at the time couldn’t handle the complexity of the layout requirements. The second board, which was used in the first volume shipments, was hand layed out by a woman at Apple who was a real genius at figuring out that kind of stuff – that board was also 2 layers, but had all kinds of issues relative to heat warping, etc. I thought the final version was a 4 layer board, which addressed some of the interconnect issues, and also was stiffer (less warping under heat) and that was a reliable enough unit to do the swap out program (I was the product marketing guy that introduced that program, which was directly managed by a guy named Jerry Bower). It was that last board that had the pads for the interlace switch, that we eventually leveraged for the Apple /// Plus.
As for layered boards, we also began using that in the Apple ][, but primarily to defeat the guys offshore that just made photocopies of the boards to create knockoffs. By burying some of the connections on the inside layers, it made it very difficult for others to copy the board, as well as produce it.
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